Verilog HDL a guide to digital design and synthesis - IEEE 1364-2001 compliant by Samir Palnitkar; foreword by Prabhu Goel
Palnitkar, Samir| Call Number | 001.6425 P18V |
| Author | Palnitkar, Samir |
| Title | Verilog HDL a guide to digital design and synthesis - IEEE 1364-2001 compliant by Samir Palnitkar; foreword by Prabhu Goel |
| Edition | 2nd ed. |
| Publication | Noida: Pearson pub., 2006 [2020]. |
| Physical Description | 490 p. |
| Added Author | Goel, Prabhu |
| Subject | Verilog (Computer hardware description language) Computer architecture Digital electronics Computers Circuits |
Total Ratings:
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$a Includes bibliographical references and index.
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| Subject | Verilog (Computer hardware description language) Computer architecture Digital electronics Computers Circuits |