Fpga implementation of signal processing modules for an interference canceller by Rajasekhar Rayapuneni; supervised by Samrat L. Sabat
Rajasekhar Rayapuneni| Call Number | PR537.5 R13F |
| Author | Rajasekhar Rayapuneni |
| Title | Fpga implementation of signal processing modules for an interference canceller by Rajasekhar Rayapuneni; supervised by Samrat L. Sabat |
| Publication | Hyderabad: University of Hyderabad, 2015. |
| Physical Description | 60p. |
| Notes | Project Reports- Casest- School of Physics |
| Added Author | Sabat, Samrat L.; Supervisor |
| Subject | INTEGRATED CIRCUIT TECHNOLOGY |
Total Ratings:
0
00760nam a2200205 a 4500
001
vtls001559759
003
VRT
005
20200221100500.0
008
170214 m 000 0 eng d
039
9
$a 202002211005 $b thirupathi $y 201702141156 $z gsr
082
$a PR537.5 $b R13F
100
1
$a Rajasekhar Rayapuneni
245
1
$a Fpga implementation of signal processing modules for an interference canceller $c by Rajasekhar Rayapuneni; supervised by Samrat L. Sabat
260
$a Hyderabad: $b University of Hyderabad, $c 2015.
300
$a 60p.
500
$a Project Reports- Casest- School of Physics
650
0
$a INTEGRATED CIRCUIT TECHNOLOGY
700
$a Sabat, Samrat L.; Supervisor
999
$a VIRTUA40
999
$a VTLSSORT0080*0820*1000*2450*2600*3000*5000*6500*7000*9992
No Reviews to Display
| Notes | Project Reports- Casest- School of Physics |
| Subject | INTEGRATED CIRCUIT TECHNOLOGY |