CPU scheduling heuristics for single ISA multicore architecture by Abhishek Mishra; supervised by Rajeev Wankar and C.R. Rao
Abhishek Mishra| Call Number | PR001.6 Ab46C |
| Author | Abhishek Mishra |
| Title | CPU scheduling heuristics for single ISA multicore architecture by Abhishek Mishra; supervised by Rajeev Wankar and C.R. Rao |
| Publication | Hyderabad: University of Hyderabad, 2012. |
| Physical Description | 46 p. |
| Notes | Project Report (M.Tech) - Department of Computer & Information Sciences - School of Mathematics, Computer & Information Sciences - University of Hyderabad - Hyderabad - 500046 - A.P - INDIA |
| Added Author | Raghavendra Rao, C.; supervisor Wankar, Rajeev; supervisor |
| Subject | COMPUTER SCIENCE - PROJECT REPORT |
Total Ratings:
0
01019nam a2200217 a 4500
001
vtls001545783
003
VRT
005
20250721155400.0
008
130926 m 000 0 eng d
039
9
$a 202507211554 $b Pad $c 202002201032 $d thirupathi $c 202002171224 $d thirupathi $c 201310301015 $d prasanna $y 201309261415 $z sinu
082
$a PR001.6 $b Ab46C
100
1
$a Abhishek Mishra
245
1
$a CPU scheduling heuristics for single ISA multicore architecture $c by Abhishek Mishra; supervised by Rajeev Wankar and C.R. Rao
260
$a Hyderabad: $b University of Hyderabad, $c 2012.
300
$a 46 p.
500
$a Project Report (M.Tech) - Department of Computer & Information Sciences - School of Mathematics, Computer & Information Sciences - University of Hyderabad - Hyderabad - 500046 - A.P - INDIA
650
0
$a COMPUTER SCIENCE - PROJECT REPORT
700
1
$a Raghavendra Rao, C.; supervisor
700
$a Wankar, Rajeev; supervisor
999
$a VIRTUA40
999
$a VTLSSORT0080*0820*1000*2450*2600*3000*5000*6500*7000*7001*9992
No Reviews to Display
| Notes | Project Report (M.Tech) - Department of Computer & Information Sciences - School of Mathematics, Computer & Information Sciences - University of Hyderabad - Hyderabad - 500046 - A.P - INDIA |
| Subject | COMPUTER SCIENCE - PROJECT REPORT |