FPGA implementation of a reliable high speed data acquisition system by Devarapalli Ajaykumar; supervised by Samart L. Sabat

Ajaykumar, Devarapalli
Call Number
PR530 A11F
Author
Ajaykumar, Devarapalli
Title
FPGA implementation of a reliable high speed data acquisition system by Devarapalli Ajaykumar; supervised by Samart L. Sabat
Publication
Hyderabad: University of Hyderabad, 2009.
Physical Description
68p.; with CD
Notes
Project Report(M.Tech.) - Integrated Circuit Technology - School of Physics - University of Hyderabad
Added Author
Sabat, Samrat L.; Supervisor
Subject
Integrated Circuit Technology - Project Report
Physics - Project Report
Total Ratings: 0
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Notes
Project Report(M.Tech.) - Integrated Circuit Technology - School of Physics - University of Hyderabad
Subject
Integrated Circuit Technology - Project Report
Physics - Project Report