On prediction accuracy of machine learning algorithms for characterizing shared L2 cache behavior of programs on multicore processors

dc.contributor.author Rai, Jitendra Kumar
dc.contributor.author Negi, Atul
dc.contributor.author Wankar, Rajeev
dc.contributor.author Nayak, K. D.
dc.contributor.author Anurag,
dc.date.accessioned 2022-03-27T00:17:01Z
dc.date.available 2022-03-27T00:17:01Z
dc.date.issued 2009-11-05
dc.description.abstract Information on a particular behavioral aspect of a program can be useful to know about the performance bottlenecks and can be utilized further to improve the performance of the system. It is observed that contention for shared L2 cache between programs running on a Multi-Core Processor (MCP) is one of the performance bottlenecks. The utilization of the L2 cache by a program, while sharing it with others on a MCP is a metric of interest to frame policies that reduce contention. In this work we investigate the ability of some of the machine learning algorithms to predict the solo run L2 cache stress of a running program on Intel quad-core Xeon X5482 processor. Data collected from hardware performance counters of Intel quad-core Xeon X5482 processor were utilized to derive the attributes to train the machine learning algorithms. We observed that the best performing machine learning algorithm in this context is Model tree (M5'), followed by Artificial Neural Networks (ANN). © 2009 IEEE.
dc.identifier.citation 2009 1st International Conference on Computational Intelligence, Communication Systems and Networks, CICSYN 2009
dc.identifier.uri 10.1109/CICSYN.2009.45
dc.identifier.uri http://ieeexplore.ieee.org/document/5231892/
dc.identifier.uri https://dspace.uohyd.ac.in/handle/1/3229
dc.title On prediction accuracy of machine learning algorithms for characterizing shared L2 cache behavior of programs on multicore processors
dc.type Conference Proceeding. Conference Paper
dspace.entity.type
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